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Effect of High Performance SiGe HBT Design Parameters on the Minimum Gate Delay of an ECL Inverter

Chafia Yahiaoui 1, 2
1. Laboratoire de Communication dans les Systèmes Informatiques (LCSI)
2. Ecole Nationale Supérieure d'Informatique (ESI), Algiers, Algeria
Abstract—In this paper, we focus on ECL inverter delay analysis through approximate analytical equations. We highlight its dependence on design parameters of SiGe HBT device as well as on electrical parameters. The advantage of this approach is to correlate the physical device parameters to the dominant time constant of this ECL gate. The simulated results show that good performances were derived from well-balanced SiGe HBT characteristics achieved through the fully-self aligned SiGe base structure with a fast forward transit time and low collector capacitance. Strict control at all stages of the technological process in the development of the device, allows the control of all these factors, and it will be possible to optimize the switching performance.

Index Terms—SiGe, high-speed devices, HBTs, ECL inverter, Silicon, Germanium

Cite: Chafia Yahiaoui, "Effect of High Performance SiGe HBT Design Parameters on the Minimum Gate Delay of an ECL Inverter," International Journal of Electronics and Electrical Engineering, Vol. 1, No. 1, pp. 23-25, March 2013. doi: 10.12720/ijeee.1.1.23-25
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