Abstract—A full-custom design fractional step-down charge pump DC-DC converter with digital control is proposed, design and simulated in 90nm 1P9M CMOS process technology. This paper aimed to design a simple and small solution size implementation of DC-DC converter with fast settling time response and low ripple output voltage implementation while not compromising efficiency requirement. Moreover, this converter can operate at internally fixed 1 MHz with input voltage from 2.2V to 3.3V suitable for two batteries power applications. The converter is design to have an output voltage of 1.1V with load current requirement of greater than 10mA, a ripple voltage less than l0mV and a faster settling time of 82.9 μs. The peak efficiency is over 75%.

Index Terms—charge-pump, DC-DC converter, fractional step- down, peak efficiency, output voltage

Cite: Jhon Ray M. Esic, Van Louven A. Buot, and Jefferson A. Hora, "Full-Custom Design Fractional Step-Down Charge Pump DC-DC Converter with Digital Control Implemented in 90nm CMOS Technology," International Journal of Electronics and Electrical Engineering, Vol. 2, No. 4, pp. 303-308, December 2014. doi: 10.12720/ijeee.2.4.303-308