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Design, Fabrication and Analysis of a 1.1 ghz Phase-Locked Loop Frequency Synthesizer for Wireless Communication Systems

Jayanta Handique 1 and Tulshi Bezboruah 2
1. Department of Electronics, Digboi College, Digboi-786171, Assam, INDIA
2. Department of Communication Technology, Gauhati University, Guwahati-781014, Assam, INDIA
Abstract—A 1.1GHz phase-locked loop frequency synthesizer has been developed, designed and fabricated to study phase noise (PN) of the system. The system has been implemented by using a frequency synthesizer (ADF4002, Analog Devices), having a low noise digital phase frequency detector, a precision charge pump, a programmable reference divider (R divider) and a programmable feedback frequency divider (N divider). The charge pump, reference divider and phase frequency divider are programmed externally through a serial peripheral interface by writing to CLOCK, DATA and LATCH ENABLE control of the device. The system is interfaced to a personnel computer through an 8085 microprocessor via RS232 serial bus. This paper will give a brief outline of the hardware design, testing and study the PN of the system.

Index Terms—phase-locked loop, loop filter, phase noise, OshonSoft

Cite: Jayanta Handique and Tulshi Bezboruah, "Design, Fabrication and Analysis of a 1.1 ghz Phase-Locked Loop Frequency Synthesizer for Wireless Communication Systems," International Journal of Electronics and Electrical Engineering, Vol. 3, No. 1, pp. 19-23, February 2015. doi: 10.12720/ijeee.3.1.19-23
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