1. How to submit my research paper? What’s the process of publication of my paper?
The journal receives submitted manuscripts via email only. Please submit your research paper in .doc or .pdf format to the submission email: ijeee@ejournal.net.
2. Can I submit an abstract?
The journal publishes full research papers. So only full paper submission should be considered for possible publication...[Read More]

Realizing Many-Valued Logic for Computation

Ben Choi, Rong Zheng, and Kankana Shukla
Computer Science, Louisiana Tech University, USA
Abstract—This paper proposes to use many-valued logic as new potentials for improving computation speeds. To facilitate the use of many-valued logic for computation, this paper describes a simple four-step process for designing many-valued circuits to implement any many-valued functions. The aim is to design and implement digital circuits entirely within the domain of many-valued logic. In a four-valued logic circuit, each wire carries two bits at a time, each logic gate operates two bits at once, and each memory cell records two bits at one time. To be able to implement four-valued logic circuits in hardware, this paper also contributes new CMOS designs of all the necessary logic gates, including disjoint unary gates, n-input AND gates, and n-input OR gates. The many-valued circuit design methodology and the many-valued logic gates provide the necessary and sufficient tools and components for exploiting the many-valued computational paradigm. 
 
Index Terms—many-valued logic, fuzzy control, circuit design, CMOS design, fuzzy system

Cite: Ben Choi, Rong Zheng, and Kankana Shukla, "Realizing Many-Valued Logic for Computation," International Journal of Electronics and Electrical Engineering, Vol. 4, No. 4, pp. 277-283, August 2016. doi: 10.18178/ijeee.4.4.277-283
Array
Copyright © 2012-2022 International Journal of Electronics and Electrical Engineering, All Rights Reserved