Abstract—As we enter multi-core era, static address mapping schemes used in conventional memory systems may lead to poor utilization of DRAM and cause unnecessary power consumption. Scheduling often helps to reduce dynamic power consumption, yet it is still difficult to allow long periods where DRAM can remain in power down/sleep mode. In this paper, we skew memory traffic by dynamically allocating pages to apposite ranks without harming system performance based on the workload behavior provided, as determined by a monitor. Our experimental results show that our mechanism can reduce power consumption by 6.1% in comparison to the conventional memory mapping scheme.
 

Index Terms—bank-level parallelism, DRAM, energy efficiency, memory mapping

Cite: Shao-Chiang Tsai, Keng-Hao Yang, Paul Jendra, and Tien-Fu Chen, "SAMS: A Self-Adaptive Mapping Scheme to Assist Page Allocation for DRAM Energy Efficiency," International Journal of Electronics and Electrical Engineering, Vol. 4, No. 4, pp. 328-334, August 2016. doi: 10.18178/ijeee.4.4.328-334