Abstract—MOS transistor play a vital role in today VLSI technology. In CMOS based design, symmetry should be followed in circuit operation. Most of the complex circuits are allowed to design in CMOS, however, there are several drawbacks present in this complementary based design. CMOS has lost its credentiality during scaling beyond 32nm. Scaling down causes severe short channel effects which are difficult to suppress. As a result of these effects, many researchers are undergone to find suitable alternate devices. Therefore, it is necessary to find alternative way suitable for particular design, instead of CMOS. Some of the research includes Multi Gate Field Effect Transistor (MuGFET) like FinFET, Nano tubes, Nano wires etc. In most of the modern design is based on Carbon nanotube because of its superior properties interms of power consumption, leakage power, delay etc. In this paper, we mainly focus on designing SRAM cell in CMOS, CNFET. In this work, 6T SRAM (symmetric structure) and 5T SRAM (asymmetric) cell in 32nm CMOS as well as CNTFET technologies and its performance has to be compared.

Index Terms—carbon nanotube, CMOS, data retention, read disturb, static RAM, write-ability

Cite: G. Boopathi Raja and M. Madheswaran, "Design and Analysis of 5-T SRAM Cell in 32nm CMOS and CNTFET Technologies," International Journal of Electronics and Electrical Engineering, Vol. 1, No. 4, pp. 256-261, December 2013. doi: 10.12720/ijeee.1.4.256-261