Abstract—MASH modulators are cascaded low order modulators that are designed to increase the fidelity of the output signal at the receiving end of the transmission medium. One sigma-delta third order dual truncation 2-1 MASH and two sigma-delta fourth order dual truncation 2-2 and 2-1-1 MASH modulators with 18-bit input format are successfully implemented in TSMC 0.13μm Logic CMOS Technology. Both the third-order and fourth-order delta-sigma MASH modulators are generated using RTL code by the aid of MATLAB and Verilog Compiler Simulator. The total area is 800.25μm2 for 2-1, 1205.75μm2 for 2-2 and 1064.5μm2 for 2-1-1 while the total cell area is 903.473167μm2 for 2-1, 1360.541228μm2 for 2-2 and 1204.5855μm2 for 2-1-1. Furthermore, the total dynamic power of the circuit for 2-1, 2-2, and 2-1-1 are 1.7496 μW, 2.8821μW and 3.3002μW respectively. The resulting signal-to-noise ratio was below 100dB. However, by the aid of the third-order Butterworth filter the original signal can be reconstructed.

Index Terms—MASH, modulator, noise shaping, DAC

Cite: Olga Joy L. Gerasta, Kenneth Harvey P. Duque, and John David B. Mangali, "2-1, 2-2 and 2-1-1 MASH Delta-Sigma Modulator for 18-Bit Audio Digital to Analog Converter," International Journal of Electronics and Electrical Engineering, Vol. 3, No. 1, pp. 44-49, February 2015. doi: 10.12720/ijeee.3.1.44-49